If you try and compile an ISR you'll get an 'Error(54): 'RCON' not found'
The K40 family do not have an RCON register... the IPEN bit has been moved to INTCON.5
SF appears to be hard-wired to expect IPEN as RCON.7, hence the error.
Code: Select all
device = 18F25K40
// SF assumes the interrupt priority bit IPEN is RCON.bits(7)
// for the K40 (and K42), there is no RCON register and
// IPEN has been moved to INTCON.bits(5)
dim IPEN as INTCON.bits(5)
public interrupt ISR()
if (PIR0.1 = 0) then
PIR0.1 = 0
endif
end interrupt
// this kludge defines an RCON register symbol so at least things will compile
// since SF will set/clear RCON.bits(7) automatically at the start of MAIN when
// using interrupts we locate RCON at the WREG address so it doesn't cause any harm
// you'll have to manage INTCON.IPEN manually
public system RCON as byte absolute $0FE8
asm
RCON EQU 0x0FE8
end asm
IPEN = 1 // this replicates SF startup code
enable(ISR)
so it's likely not going to be just this one chip going forward.